The present invention relates to DC-DC converters and in particular, to a DC-DC converter having improved features including improved transient response in a multiphase converter application, improved response to a power state indication signal indicating the load condition, thermal compensation for the inherent DC resistance of the phase output inductors and providing improved converter output current information.
In a running multiphase buck converter, when a phase that was previously shut down is turned on, if the low side switch is turned on before the high side switch, this can result in a perturbation in the current sharing loop resulting in poor transient response and might also saturate the inductors in already operating phases. It is an object of the invention to reduce this perturbation and improve the transient response of a multiphase converter when a phase is turned on.
A further object of the present invention is to utilize the PSI (power state indicator) signal that is provided from the CPU being powered by the converter. Typically, multiphase converters are used to power microprocessor CPU chips. The CPU maker provides a PSI indication signal to indicate the load requirements. During light load condition, PSI can be used to shut down phases to reduce related switching losses. During heavy load, the signal can be used to add phases. Adding or removing phases leads to a loop bandwidth change and a poor transient response. It is an object of the present invention to utilize the PSI signal to overcome the interaction between load change and converter loop bandwidth change and to improve the converter transient response to the PSI signal.
Electricity usage has seen a tremendous growth, particularly in datacenters in recent years. Server farms and data centers are demanding higher efficiency for servers. Green power requirements are also pushing the industry to pursue more efficient power conversion.
In reality, server processors function in either idle state, approximately 20% of full load, or running state. Shedding phases can substantially reduce the switching losses and improve idle state efficiency, as shown in FIGS. 1A and 1B. Phase shedding operation improves the efficiency by dropping certain phases in a multiphase regulator when not needed. This is determined by instruction from the processor and other devices in a system. The actual algorithm is generated by either the microprocessor CPU or the voltage regulator itself to operate the regulator at the most efficient point. This could be called “power on demand” operation. A new generation of microprocessors provides Power State Indicator (PSI) signal to enable the voltage regulator to maximize its conversion efficiency. When PSI is asserted, the CPU will enter into a low or idle power operation state.
Phase shedding can reduce power conversion losses, but the voltage loop dynamically changes as well. The LC double pole of the converter transfer function moves in accordance with the number of phases present in the loop. Average current sharing is widely used to balance the current per phase in voltage mode regulators. Current loop perturbations occur once the number of phases present in the loop change, even with no change in load, since the rest of the phases need to source the current previously carried by the shedding phases.
In addition, the PSI signal normally accompanies a load change. It is important to control the dynamic changing in the number of phases around these transient events. When the load increases, more phases are needed and the corresponding lower output impedance and higher loop bandwidth are preferred. However, it is important to control inductor current of each phase being added to the regulator. The inductor current of each disabled phase is zero during the PSI assertion period. When a disabled phase is added back with no inductor current, the modulator may respond by enabling the synchronous MOSFET. This causes the added phase to sink current, which imposes an extra load to the rest of the phases, and it is even possible to have the inductors saturate. Such a scenario also brings larger current differences between the existing phases and newly added phases, and it takes a longer time to reach the balance point.
In addition, modern microprocessors can rapidly shift between a sleep state and full load operation, placing a heavy requirement on the voltage regulator (VR) to stabilize its output voltage. Further, such a load transient can occur with a high repetition rate. As aforementioned, if synchronous FETs are turned on ahead of control FETs when PSI de-asserts, a current perturbation occurs and if high repetitive transients occur and the repetition frequency is higher than the current sharing loop bandwidth, the converter might see a larger than normal current excursion range for each phase. Excessive output voltage ripple or inductor saturation might occur. An excessive voltage variation could cause the microprocessor to malfunction, reset, latch up or fail. Therefore, it is important that the phase shedding implementation does not sacrifice the low output impedance needed for transient performance.
Another object of the invention is to improve the widely used phase output inductor direct current resistance (DCR) sensing technique. The DCR sensing technique relies on the inherent inductor direct current resistance to provide lossless current sensing. With this method, it is not necessary to place a resistor in series with the output inductor, thereby preventing the losses incurred by having a series output resistance. A drawback of the lossless DCR current sensing technique is that there is a temperature dependency of the measured current information since the DCR changes with temperature. In the past, in power converters, several components with negative temperature coefficient (NTC) and even combined with other components with positive temperature coefficient (PTC), are introduced in the converter circuit to obtain correct current information, and also to provide overcurrent protection. It is an object of the present invention to provide a technique which utilizes only a signal NTC component to provide correct current information.
A further object of the present invention is to provide a current monitor output (IMON) with programmable slope to provide accurate converter current information referenced to a remote Kelvin ground.